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VLSID
2007
IEEE

Low Power Implementation for Minimum Norm Sorting and Block Upper Tri-angularization of Matrices used in MIMO Wireless Systems

14 years 11 months ago
Low Power Implementation for Minimum Norm Sorting and Block Upper Tri-angularization of Matrices used in MIMO Wireless Systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumption. This paper proposes an area and power efficient VLSI architecture that can serve the dual purpose of minimum norm sorting of rows as well as upper/lower block tri-angularization of matrices. The resources inside the architecture are shared among both operations and only primitive computations are used. Results indicate saving in silicon real estate as well as power consumption compared to previous architecture without degrading performance.
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme
Added 30 Nov 2009
Updated 30 Nov 2009
Type Conference
Year 2007
Where VLSID
Authors Zahid Khan, Tughrul Arslan, John S. Thompson, Ahmet T. Erdogan
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