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» High Performance Matrix Multiplication on Many Cores
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TRIDENTCOM
2008
IEEE
14 years 3 months ago
On the use of SHIM6 for mobility support in IMS networks
—The future of network communications is moving towards deployment of an all-IP core network. This has given rise to many devices hitting the market equipped with multiple networ...
John Ronan, Sasitharan Balasubramaniam, Adnan K. K...
ICRA
2010
IEEE
120views Robotics» more  ICRA 2010»
13 years 7 months ago
Probabilistic search with agile UAVs
— Through their ability to rapidly acquire aerial imagery, Unmanned Aerial Vehicles (UAVs) have the potential to aid target search tasks. Many of the core algorithms which are us...
Sonia Waharte, Andrew Colquhoun Symington, Niki Tr...
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
13 years 11 months ago
Fault tolerant nanoelectronic processor architectures
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
HASKELL
2009
ACM
14 years 3 months ago
Types are calling conventions
It is common for compilers to derive the calling convention of a function from its type. Doing so is simple and modular but misses many optimisation opportunities, particularly in...
Maximilian C. Bolingbroke, Simon L. Peyton Jones
CLUSTER
2007
IEEE
14 years 1 months ago
Identifying energy-efficient concurrency levels using machine learning
Abstract-- Multicore microprocessors have been largely motivated by the diminishing returns in performance and the increased power consumption of single-threaded ILP microprocessor...
Matthew Curtis-Maury, Karan Singh, Sally A. McKee,...