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ICDCS
2009
IEEE
13 years 6 months ago
The Case for Spam-Aware High Performance Mail Server Architecture
The email volume per mailbox has largely remained low and unchanged in the past several decades, and hence mail server performance has largely remained a secondary issue. The stee...
Abhinav Pathak, Syed Ali Raza Jafri, Y. Charlie Hu
VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
14 years 9 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal
TSMC
2008
117views more  TSMC 2008»
13 years 7 months ago
Discovery of High-Level Behavior From Observation of Human Performance in a Strategic Game
This paper explores the issues faced in creating a sys-4 tem that can learn tactical human behavior merely by observing5 a human perform the behavior in a simulation. More specific...
Brian S. Stensrud, Avelino J. Gonzalez
CSREAESA
2006
13 years 10 months ago
An Efficient Design of High Speed Network Security Platform using Network Processor
: The explosive growth of internet traffic and the increasing complexity of the functions performed by network nodes have given rise to a new breed of programmable micro-processors...
Yong-Sung Jeon, Sang-Woo Lee, Ki-Young Kim
BMCBI
2010
218views more  BMCBI 2010»
13 years 8 months ago
Fast multi-core based multimodal registration of 2D cross-sections and 3D datasets
Background: Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve...
Michael Scharfe, Rainer Pielot, Falk Schreiber