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» High Performance Pipelined Process Migration with RDMA
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ICS
1998
Tsinghua U.
13 years 11 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
MICRO
2007
IEEE
150views Hardware» more  MICRO 2007»
14 years 1 months ago
Leveraging 3D Technology for Improved Reliability
Aggressive technology scaling over the years has helped improve processor performance but has caused a reduction in processor reliability. Shrinking transistor sizes and lower sup...
Niti Madan, Rajeev Balasubramonian
CIKM
2008
Springer
13 years 9 months ago
Cache-aware load balancing for question answering
The need for high performance and throughput Question Answering (QA) systems demands for their migration to distributed environments. However, even in such cases it is necessary t...
David Dominguez-Sal, Mihai Surdeanu, Josep Aguilar...
PERCOM
2006
ACM
14 years 7 months ago
Adaptive Medical Feature Extraction for Resource Constrained Distributed Embedded Systems
Tiny embedded systems have not been an ideal outfit for high performance computing due to their constrained resources. Limitations in processing power, battery life, communication ...
Roozbeh Jafari, Hyduke Noshadi, Majid Sarrafzadeh,...
BMCBI
2010
136views more  BMCBI 2010»
13 years 7 months ago
The IronChip evaluation package: a package of perl modules for robust analysis of custom microarrays
Background: Gene expression studies greatly contribute to our understanding of complex relationships in gene regulatory networks. However, the complexity of array design, producti...
Yevhen Vainshtein, Mayka Sanchez, Alvis Brazma, Ma...