142 search results - page 7 / 29 » High Performance Pipelined Process Migration with RDMA |
CF
2004
ACM
14 years 28 days ago
2004
ACM
This paper presents a fault tolerant design technique for the clockless wave pipeline. The specific architectural model investigated in this paper is the two-phase clockless asyn...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
DATE
2003
IEEE
14 years 24 days ago
2003
IEEE
: Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath des...
ISVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
BMCBI
2006
13 years 7 months ago
2006
Background: Migration is an important aspect of cellular behaviour and is therefore widely studied in cell biology. Numerous components are known to participate in this process in...