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IPPS
2010
IEEE
13 years 6 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
SASO
2007
IEEE
14 years 3 months ago
e-SAFE: An Extensible, Secure and Fault Tolerant Storage System
With the rapidly falling price of hardware, and increasingly available bandwidth, the storage technology is seeing a paradigm shift from centralized and managed mode to distribute...
Sandip Agarwala, Arnab Paul, Umakishore Ramachandr...
RTAS
1997
IEEE
14 years 29 days ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
HIPC
2009
Springer
13 years 6 months ago
Comparing the performance of clusters, Hadoop, and Active Disks on microarray correlation computations
Abstract--Microarray-based comparative genomic hybridization (aCGH) offers an increasingly fine-grained method for detecting copy number variations in DNA. These copy number variat...
Jeffrey A. Delmerico, Nathanial A. Byrnes, Andrew ...
ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
14 years 3 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...