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NOCS
2010
IEEE
13 years 5 months ago
Design of a High-Throughput Distributed Shared-Buffer NoC Router
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...
Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin,...
RTCSA
2007
IEEE
14 years 1 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
ISVC
2009
Springer
14 years 2 months ago
High-Quality Rendering of Varying Isosurfaces with Cubic Trivariate C1-Continuous Splines
Smooth trivariate splines on uniform tetrahedral partitions are well suited for high-quality visualization of isosurfaces from scalar volumetric data. We propose a novel rendering ...
Thomas Kalbe, Thomas Koch, Michael Goesele
ICES
2010
Springer
277views Hardware» more  ICES 2010»
13 years 5 months ago
An Efficient, High-Throughput Adaptive NoC Router for Large Scale Spiking Neural Network Hardware Implementations
Recently, a reconfigurable and biologically inspired paradigm based on network-on-chip (NoC) and spiking neural networks (SNNs) has been proposed as a new method of realising an ef...
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep...
CVPR
2011
IEEE
13 years 3 months ago
P2C2: Programmable Pixel Compressive Camera for High Speed Imaging.
We describe an imaging architecture for compressive video sensing termed programmable pixel compressive camera (P2C2). P2C2 allows us to capture fast phenomena at frame rates high...
Dikpal Reddy, Ashok Veeraraghavan