Sciweavers

733 search results - page 111 / 147
» High performance in tree-based parallel architectures
Sort
View
IPPS
2006
IEEE
14 years 2 months ago
Dual-layered file cache on cc-NUMA system
CC-NUMA is a widely adopted and deployed architecture of high performance computers. These machines are attractive for their transparent access to local and remote memory. However...
Zhou Yingchao, Meng Dan, Ma Jie
CLUSTER
2007
IEEE
13 years 8 months ago
Meta-communications in component-based communication frameworks for grids
— Applications are faced with several network-related problems on current grids: heterogeneous networks, firewalls, NAT, private IP addresses, non-routed networks, performance p...
Alexandre Denis
PPAM
2007
Springer
14 years 2 months ago
The Relevance of New Data Structure Approaches for Dense Linear Algebra in the New Multi-Core / Many Core Environments
For about ten years now, Bo K˚agstr¨om’s Group in Umea, Sweden, Jerzy Wa´sniewski’s Team at Danish Technical University in Lyngby, Denmark, and I at IBM Research in Yorktown...
Fred G. Gustavson
MICRO
1998
IEEE
98views Hardware» more  MICRO 1998»
14 years 1 months ago
Task Selection for a Multiscalar Processor
The Multiscalar architecture advocates a distributed processor organization and task-level speculation to exploit high degrees of instruction level parallelism (ILP) in sequential...
T. N. Vijaykumar, Gurindar S. Sohi
HPCA
2007
IEEE
14 years 9 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...