Sciweavers

733 search results - page 19 / 147
» High performance in tree-based parallel architectures
Sort
View
ICASSP
2011
IEEE
12 years 11 months ago
A high throughput parallel AVC/H.264 context-based adaptive binary arithmetic decoder
In this paper, based on the proposed parallelization scheme of binary arithmetic decoding, a parallel AVC/H.264 context-based adaptive binary arithmetic coding (CABAC) decoder wit...
Jia-Wei Liang, He-Yuan Lin, Gwo Giun Lee
SPIESR
1996
118views Database» more  SPIESR 1996»
13 years 9 months ago
Performances of Multiprocessor Multidisk Architectures for Continuous Media Storage
Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In orde...
Benoit A. Gennart, Vincent Messerli, Roger D. Hers...
PADS
2006
ACM
14 years 1 months ago
Aurora: An Approach to High Throughput Parallel Simulation
A master/worker paradigm for executing large-scale parallel discrete event simulation programs over networkenabled computational resources is proposed and evaluated. In contrast t...
Alfred Park, Richard M. Fujimoto
SAMOS
2010
Springer
13 years 6 months ago
Interleaving granularity on high bandwidth memory architecture for CMPs
—Memory bandwidth has always been a critical factor for the performance of many data intensive applications. The increasing processor performance, and the advert of single chip m...
Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex...
EGPGV
2004
Springer
119views Visualization» more  EGPGV 2004»
14 years 1 months ago
Parallel Implicit Integration for Cloth Animations on Distributed Memory Architectures
We present a parallel cloth simulation engine designed for distributed memory parallel architectures, in particular clusters built of commodity components. We focus on efficient ...
Michael Keckeisen, Wolfgang Blochinger