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CONCURRENCY
2004
151views more  CONCURRENCY 2004»
13 years 7 months ago
User transparency: a fully sequential programming model for efficient data parallel image processing
Although many image processing applications are ideally suited for parallel implementation, most researchers in imaging do not benefit from high performance computing on a daily b...
Frank J. Seinstra, Dennis Koelma
GRID
2004
Springer
14 years 1 months ago
DIRAC: A Scalable Lightweight Architecture for High Throughput Computing
— DIRAC (Distributed Infrastructure with Remote Agent Control) has been developed by the CERN LHCb physics experiment to facilitate large scale simulation and user analysis tasks...
Andrei Tsaregorodtsev, Vincent Garonne, Ian Stokes...
MICRO
2006
IEEE
132views Hardware» more  MICRO 2006»
14 years 1 months ago
Scalable Cache Miss Handling for High Memory-Level Parallelism
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
James Tuck, Luis Ceze, Josep Torrellas
EUROPAR
1999
Springer
13 years 12 months ago
Building the Teraflops/Petabytes Production Supercomputing Center
In just one decade, the 1990s, supercomputer centers have undergone two fundamental transitions which require rethinking their operation and their role in high performance computin...
Horst D. Simon, William T. C. Kramer, Robert F. Lu...
IPPS
2008
IEEE
14 years 2 months ago
A plug-and-play model for evaluating wavefront computations on parallel architectures
This paper develops a plug-and-play reusable LogGP model that can be used to predict the runtime and scaling behavior of different MPI-based pipelined wavefront applications runni...
Gihan R. Mudalige, Mary K. Vernon, Stephen A. Jarv...