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WSC
2004
13 years 10 months ago
Improving the Performance of Dispatching Rules in Semiconductor Manufacturing by Iterative Simulation
In this paper, we consider semiconductor manufacturing processes that can be characterized by a diverse product mix, heterogeneous parallel machines, sequence-dependent setup time...
Lars Mönch, Jens Zimmermann
IPPS
2002
IEEE
14 years 1 months ago
Compression-Domain Parallel Rendering
Three dimensional triangle mesh is the dominant representation used in parallel rendering of 3D geometric models. However, explosive growth in the complexity of the mesh-based 3D ...
Tulika Mitra, Tzi-cker Chiueh
HPCA
1998
IEEE
14 years 15 days ago
Non-Stalling CounterFlow Architecture
The counterflow pipeline concept was originated by Sproull et al.[1] to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making an...
Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu
MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
14 years 1 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...
ASAP
2008
IEEE
82views Hardware» more  ASAP 2008»
14 years 3 months ago
Run-time thread sorting to expose data-level parallelism
We address the problem of data parallel processing for computational quantum chemistry (CQC). CQC is a computationally demanding tool to study the electronic structure of molecule...
Tirath Ramdas, Gregory K. Egan, David Abramson, Ki...