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DAC
2005
ACM
14 years 9 months ago
Simulation based deadlock analysis for system level designs
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. S...
PERCOM
2005
ACM
14 years 7 months ago
Reducing the Calibration Effort for Location Estimation Using Unlabeled Samples
WLAN location estimation based on 802.11 signal strength is becoming increasingly prevalent in today's pervasive computing applications. As alternative to the wellestablished...
Xiaoyong Chai, Qiang Yang
LCPC
2005
Springer
14 years 1 months ago
Software Thread Level Speculation for the Java Language and Virtual Machine Environment
Thread level speculation (TLS) has shown great promise as a strategy for fine to medium grain automatic parallelisation, and in a hardware context techniques to ensure correct TLS...
Christopher J. F. Pickett, Clark Verbrugge
DAC
1997
ACM
14 years 10 days ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...
SIGCOMM
1997
ACM
14 years 10 days ago
Internet Routing Instability
Abstract—This paper examines the network interdomain routing information exchanged between backbone service providers at the major U.S. public Internet exchange points. Internet ...
Craig Labovitz, G. Robert Malan, Farnam Jahanian