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CODES
2007
IEEE
14 years 4 months ago
Three-dimensional multiprocessor system-on-chip thermal optimization
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
Chong Sun, Li Shang, Robert P. Dick
CSFW
2007
IEEE
14 years 4 months ago
Creating Vulnerability Signatures Using Weakest Preconditions
Signature-based tools such as network intrusion detection systems are widely used to protect critical systems. Automatic signature generation techniques are needed to enable these...
David Brumley, Hao Wang, Somesh Jha, Dawn Xiaodong...
IPCCC
2007
IEEE
14 years 4 months ago
Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study
As Chip Multiprocessor (CMP) has become the mainstream in processor architectures, Intel and AMD have introduced their dual-core processors to the PC market. In this paper, perfor...
Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-K...
EMSOFT
2007
Springer
14 years 4 months ago
Methods for multi-dimensional robustness optimization in complex embedded systems
Design space exploration of embedded systems typically focuses on classical design goals such as cost, timing, buffer sizes, and power consumption. Robustness criteria, i.e. sensi...
Arne Hamann, Razvan Racu, Rolf Ernst
CODES
2006
IEEE
14 years 3 months ago
A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...
Wei Qin, Joseph D'Errico, Xinping Zhu