Our research focuses on end-to-end congestion avoidance algorithms that use round trip time (RTT) fluctuations as an indicator of the level of network congestion. The algorithms a...
Field Programmable Gate Arrays (FPGAs) can be used in Intrusion Prevention Systems (IPS) to inspect application data contained within network flows. An IPS operating on high-speed...
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
Most algorithms proposed for controlling traffic prior to entering ATM networks are based on static mechanisms. Such static control mechanisms do not account for the dynamics of ...
Cameron Braun, V. Sirkay, H. Uriona, Srini W. Seet...
In this paper, we propose an Ethernet-based transmission-guaranteed, congestion-controlled network using a simplified multi-path aggregation scheme. Multi-path aggregation increas...