Sciweavers

    290 search results - page 2 / 58
    » High-Speed MARS Hardware
    Sort
    View
    ACL
    1990
    92views Computational Linguistics» more  ACL 1990»
    A Hardware Algorithm for High Speed Morpheme Extraction and its Implementation
    13 years 8 months ago
    A Hardware Algorithm for High Speed Morpheme Extraction and its Implementation
    Download  www.aclweb.org
    This paper describes a new hardware algorithm for morpheme extraction and its implementation on a specific machine (MEX-I), as the first step toward achieving natural language par...
    Toshikazu Fukushima, Yutaka Ohyama, Hitoshi Miyai
    claim paper
    Read More »
    RTAS
    1997
    IEEE
    176views Embedded Systems» more  RTAS 1997»
    Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
    13 years 11 months ago
    Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
    Download  www.cs.pitt.edu
    ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
    Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
    claim paper
    Read More »
    HOTI
    2008
    IEEE
    118views Distributed And Parallel Com...» more  HOTI 2008»
    An Efficient Hardware-Based Multi-hash Scheme for High Speed IP Lookup
    14 years 1 months ago
    An Efficient Hardware-Based Multi-hash Scheme for High Speed IP Lookup
    Download  cial.csie.ncku.edu.tw
    Socrates Demetriades, Michel Hanna, Sangyeun Cho, ...
    claim paper
    Read More »
    FCCM
    2004
    IEEE
    112views VLSI» more  FCCM 2004»
    ShareStreams: A Scalable Architecture and Hardware Support for High-Speed QoS Packet Schedulers
    13 years 11 months ago
    ShareStreams: A Scalable Architecture and Hardware Support for High-Speed QoS Packet Schedulers
    Download  www.cercs.gatech.edu
    Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten ...
    claim paper
    Read More »
    ICCD
    2006
    IEEE
    166views Hardware» more  ICCD 2006»
    FPGA Implementation of High Speed FIR Filters Using Add and Shift Method
    14 years 4 months ago
    FPGA Implementation of High Speed FIR Filters Using Add and Shift Method
    Download  www.ece.ucsb.edu
    Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.