140 search results - page 24 / 28 » High-level design for asynchronous logic |
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
Synchronous design methods have intrinsic performance overheads due to their use of the global clock and timing assumptions. In future manufacturing processes not only may it beco...
CBSE
2005
Springer
14 years 1 months ago
2005
Springer
We consider a class of component-based software models with interaction style of buffered asynchronous message passing between components with ports, represented by UML-RT. After ...
VSTTE
2005
Springer
14 years 1 months ago
2005
Springer
The interplay back and forth between software model checking and hardware model checking has been fruitful for both. Originally intended for the analysis of concurrent software, mo...
TC
1998
13 years 7 months ago
1998
—The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational fau...
PEPM
2009
ACM
14 years 3 days ago
2009
ACM
A requirement of any source language is to be rich in features and concise to use by the programmers. As a drawback, it is often too complex to analyse, causing research studies t...