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» High-level design for asynchronous logic
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DATE
2006
IEEE
141views Hardware» more  DATE 2006»
14 years 1 months ago
Evaluating coverage of error detection logic for soft errors using formal methods
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...
Udo Krautz, Matthias Pflanz, Christian Jacobi 0002...
BIRTHDAY
2012
Springer
12 years 3 months ago
Cryptography with Asynchronous Logic Automata
We introduce the use of asynchronous logic automata (ALA) for cryptography. ALA aligns the descriptions of hardware and software for portability, programmability, and scalability. ...
Peter Schmidt-Nielsen, Kailiang Chen, Jonathan Bac...
ISCAS
2003
IEEE
135views Hardware» more  ISCAS 2003»
14 years 27 days ago
Formal verification of LTL formulas for SystemC designs
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
Daniel Große, Rolf Drechsler
DMDW
2003
134views Management» more  DMDW 2003»
13 years 9 months ago
Using Design Guidelines to Improve Data Warehouse Logical Design
Data Warehouse-(DW) logical design often start with a conceptual schema and then generates relational structures. Applying this approach implies to cope with two main aspects: (i) ...
Verónika Peralta, Raul Ruggia
ASYNC
2000
IEEE
181views Hardware» more  ASYNC 2000»
14 years 1 days ago
Asynchronous Design Using Commercial HDL Synthesis Tools
New design technologies rely on truly reusable IP blocks with simple means of assembly. Asynchronous methodologies could be a promising option to implement these requirements. Pro...
Michiel M. Ligthart, Karl Fant, Ross Smith, Alexan...