Sciweavers

1933 search results - page 106 / 387
» High-performance computing using accelerators
Sort
View
WSCG
2003
318views more  WSCG 2003»
13 years 11 months ago
Quality Issues of Hardware-Accelerated High-Quality Filtering on PC Graphics Hardware
This paper summarizes several quality issues of an approach for high-quality filtering with arbitrary filter kernels on PC graphics hardware that has been presented previously. ...
Markus Hadwiger, Helwig Hauser, Torsten Mölle...
DNA
2007
Springer
106views Bioinformatics» more  DNA 2007»
14 years 2 months ago
Hardware Acceleration for Thermodynamic Constrained DNA Code Generation
Reliable DNA computing requires a large pool of oligonucleotides that do not produce cross-hybridize. In this paper, we present a transformed algorithm to calculate the maximum wei...
Qinru Qiu, Prakash Mukre, Morgan Bishop, Daniel J....
ASAP
2004
IEEE
123views Hardware» more  ASAP 2004»
14 years 1 months ago
A Packet Scheduling Algorithm for IPSec Multi-Accelerator Based Systems
IPSec is a suite of protocols that adds security to communications at the IP level. Protocols within the IPSec suite make extensive use of cryptographic algorithms. Since these al...
Fabien Castanier, Alberto Ferrante, Vincenzo Piuri
PDPTA
2003
13 years 11 months ago
Procedures for Computing the Maximum with DNA Strands
Abstract: In recent works for high performance computing, computation with DNA molecules, that is, DNA computing, has considerable attention as one of nonsilicon based computings. ...
Satoshi Kamio, Akiko Takehara, Akihiro Fujiwara
ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
14 years 1 days ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...