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AINA
2007
IEEE
14 years 3 months ago
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
Antonio Flores, Juan L. Aragón, Manuel E. A...
ARITH
2007
IEEE
14 years 3 months ago
P6 Binary Floating-Point Unit
The floating point unit of the next generation PowerPC is detailed. It has been tested at over 5 GHz. The design supports an extremely aggressive cycle time of 13 FO4 using a tech...
Son Dao Trong, Martin S. Schmookler, Eric M. Schwa...
ICPPW
2006
IEEE
14 years 3 months ago
Towards a Source Level Compiler: Source Level Modulo Scheduling
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
Yosi Ben-Asher, Danny Meisler
IPPS
2006
IEEE
14 years 3 months ago
Making lockless synchronization fast: performance implications of memory reclamation
Achieving high performance for concurrent applications on modern multiprocessors remains challenging. Many programmers avoid locking to improve performance, while others replace l...
Thomas E. Hart, Paul E. McKenney, Angela Demke Bro...
MOBIWAC
2006
ACM
14 years 3 months ago
Indoor tracking in WLAN location with TOA measurements
Authors presented recently an indoor location technique based on Time Of Arrival (TOA) obtained from Round-Trip-Time (RTT) measurements at data link level and trilateration. This ...
Marc Ciurana, Francisco Barceló, Sebastiano...