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» High-performance computing using accelerators
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PC
2007
99views Management» more  PC 2007»
13 years 8 months ago
High-performance computing using accelerators
Wu-chun Feng, Dinesh Manocha
IPPS
2009
IEEE
14 years 3 months ago
Flexible pipelining design for recursive variable expansion
Many image and signal processing kernels can be optimized for performance consuming a reasonable area by doing loops parallelization with extensive use of pipelining. This paper p...
Zubair Nawaz, Thomas Marconi, Koen Bertels, Todor ...
ARC
2010
Springer
387views Hardware» more  ARC 2010»
14 years 3 months ago
Optimising Memory Bandwidth Use for Matrix-Vector Multiplication in Iterative Methods
Computing the solution to a system of linear equations is a fundamental problem in scientific computing, and its acceleration has drawn wide interest in the FPGA community [1–3]...
David Boland, George A. Constantinides
FPGA
2012
ACM
285views FPGA» more  FPGA 2012»
12 years 4 months ago
Optimizing SDRAM bandwidth for custom FPGA loop accelerators
Memory bandwidth is critical to achieving high performance in many FPGA applications. The bandwidth of SDRAM memories is, however, highly dependent upon the order in which address...
Samuel Bayliss, George A. Constantinides