Sciweavers

1933 search results - page 84 / 387
» High-performance computing using accelerators
Sort
View
CGI
2001
IEEE
14 years 17 days ago
Hardware-Accelerated Rendering of Antialiased Shadows with Shadow Maps
We present a hardware-accelerated method for rendering high quality, antialiased shadows using the shadow map approach. Instead of relying on dedicated hardware support for shadow...
Stefan Brabec, Hans-Peter Seidel
SC
2009
ACM
14 years 3 months ago
FPGA-based acceleration of CHARMM-potential minimization
Energy minimization is an important step in molecular modeling, with applications in molecular docking and in mapping binding sites. Minimization involves repeated evaluation of v...
Bharat Sukhwani, Martin C. Herbordt
ASPDAC
2001
ACM
82views Hardware» more  ASPDAC 2001»
14 years 17 days ago
A virtual 3-D multipole accelerated extractor for VLSI parasitic interconnect capacitance
A virtual 3-D extractor of the single dielectric is presented in this paper. In the indirect boundary integral equations, the plane charge distribution on the surface of conductors...
Zhaozhi Yang, Zeyi Wang, Shuzhou Fang
DAC
1989
ACM
14 years 29 days ago
Special Purpose Architecture for Accelerating Bitmap DRC
In this paper we propose algorithms for performing DRC on a bitmapped layout altd developspecial purpose architecture for its implementation. we Use window scan method, with flexib...
Narasimha B. Bhat, S. K. Nandy
CHES
2005
Springer
111views Cryptology» more  CHES 2005»
14 years 2 months ago
Hardware Acceleration of the Tate Pairing in Characteristic Three
Although identity based cryptography offers many functional advantages over conventional public key alternatives, the computational costs are significantly greater. The core comp...
Philipp Grabher, Dan Page