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DFT
2004
IEEE
134views VLSI» more  DFT 2004»
13 years 11 months ago
On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars
Defect tolerance is an extremely important aspect in nano-scale electronics as the bottom-up selfassembly fabrication process results in a significantly higher defect density comp...
Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lomb...
IPPS
2007
IEEE
14 years 1 months ago
Speculative Flow Control for High-Radix Datacenter Interconnect Routers
High-radix switches are desirable building blocks for large computer interconnection networks, because they are more suitable to convert chip I/O bandwidth into low latency and lo...
Cyriel Minkenberg, Mitchell Gusat
WCE
2007
13 years 8 months ago
Dynamic Scheduling Algorithm for input-queued crossbar switches
— Crossbars are main components of communication switches used to construct interconnection networks. Scheduling algorithm controls contention in switch architecture. Several sch...
Mihir V. Shah, Mehul C. Patel, Dinesh J. Sharma, A...
HOTI
2002
IEEE
14 years 9 days ago
A Four-Terabit Single-Stage Packet Switch with Large Round-Trip Time Support
We present the architecture and practical VLSI implementation of a 4-Tb/s single-stage switch. It is based on a combined input- and crosspoint-queued structure with virtual output...
François Abel, Cyriel Minkenberg, Ronald P....
ANCS
2007
ACM
13 years 11 months ago
Congestion management for non-blocking clos networks
We propose a distributed congestion management scheme for non-blocking, 3-stage Clos networks, comprising plain buffered crossbar switches. VOQ requests are routed using multipath...
Nikolaos Chrysos