Sciweavers

537 search results - page 11 / 108
» High-precision interconnect analysis
Sort
View
TC
2008
13 years 7 months ago
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
IPPS
1996
IEEE
13 years 11 months ago
An Optical Interconnect Model for k-ary n-cube Wormhole Networks
This paper presents an optical interconnect model for kary n-cube network topologies based on free-space analysis. This model integrates relevant parameters inherent to optics wit...
Mongkol Raksapatcharawong, Timothy Mark Pinkston
LCN
1995
IEEE
13 years 11 months ago
Interconnection of FDDI-II networks through an ATM backbone - An analysis
The waiting tame and queue length characteristics of isochronous, synchronous and asynchronous traffic at the gateway between FDDI-11 and A T M networks are analyzed. A generalize...
Ramanagopal V. Vogety, Yashwant K. Malaiya, Anura ...
ISCAS
2003
IEEE
110views Hardware» more  ISCAS 2003»
14 years 20 days ago
Interconnect modeling and sensitivity analysis using adjoint networks reduction technique
An efficient model-order reduction technique for general RLC networks is proposed. The method is extended from the previous projection-base moment matching method with considerin...
Herng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng