Sciweavers

72 search results - page 6 / 15
» High-throughput Pipelined Mergesort
Sort
View
157
Voted
BMCBI
2011
14 years 11 months ago
OrthoInspector: comprehensive orthology analysis and visual exploration
Background: The accurate determination of orthology and inparalogy relationships is essential for comparative sequence analysis, functional gene annotation and evolutionary studie...
Benjamin Linard, Julie D. Thompson, Olivier Poch, ...
118
Voted
ERSA
2004
148views Hardware» more  ERSA 2004»
15 years 5 months ago
Efficient Floating-point Based Block LU Decomposition on FPGAs
In this paper, we propose an architecture for floatingpoint based LU decomposition for large-sized matrices. Our proposed architecture is based on the well known concept of blocki...
Gokul Govindu, Viktor K. Prasanna, Vikash Daga, Sr...
ISCA
2005
IEEE
126views Hardware» more  ISCA 2005»
15 years 9 months ago
A Tree Based Router Search Engine Architecture with Single Port Memories
Pipelined forwarding engines are used in core routers to meet speed demands. Tree-based searches are pipelined across a number of stages to achieve high throughput, but this resul...
Florin Baboescu, Dean M. Tullsen, Grigore Rosu, Su...
142
Voted
ANCS
2006
ACM
15 years 10 months ago
CAMP: fast and efficient IP lookup architecture
A large body of research literature has focused on improving the performance of longest prefix match IP-lookup. More recently, embedded memory based architectures have been propos...
Sailesh Kumar, Michela Becchi, Patrick Crowley, Jo...
CF
2008
ACM
15 years 6 months ago
Multi-terabit ip lookup using parallel bidirectional pipelines
To meet growing terabit link rates, highly parallel and scalable architectures are needed for IP lookup engines in next generation routers. This paper proposes an SRAM-based multi...
Weirong Jiang, Viktor K. Prasanna