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TE
2010
104views more  TE 2010»
13 years 2 months ago
Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
Scott C. Smith, Waleed Al-Assadi, Jia Di
GLVLSI
2006
IEEE
143views VLSI» more  GLVLSI 2006»
14 years 1 months ago
SACI: statistical static timing analysis of coupled interconnects
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, A...
PAMI
2010
168views more  PAMI 2010»
13 years 6 months ago
Dynamic Hybrid Algorithms for MAP Inference in Discrete MRFs
—In this paper, we present novel techniques that improve the computational and memory efficiency of algorithms for solving multi-label energy functions arising from discrete MRF...
Karteek Alahari, Pushmeet Kohli, Philip H. S. Torr
ACSAC
2004
IEEE
13 years 11 months ago
Tracing the Root of "Rootable" Processes
In most existing systems, the authorization check for system resource access is based on the user ID of the running processes. Such systems are vulnerable to password stealing/cra...
Amit Purohit, Vishnu Navda, Tzi-cker Chiueh
DAC
2000
ACM
14 years 8 months ago
Unifying behavioral synthesis and physical design
eously demand shorter and less costly design cycles. Designing at higher levels of abstraction makes both objectives achievable, but enabling techniques like behavioral synthesis h...
William E. Dougherty, Donald E. Thomas