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IEEEPACT
2009
IEEE
14 years 2 months ago
Using Aggressor Thread Information to Improve Shared Cache Management for CMPs
—Shared cache allocation policies play an important role in determining CMP performance. The simplest policy, LRU, allocates cache implicitly as a consequence of its replacement ...
Wanli Liu, Donald Yeung
EDOC
2006
IEEE
14 years 1 months ago
Services and Networks management through embedded devices and SOA
In this paper we present an embedded device able to manage the remote boot of network nodes by means of Wake on LAN (WoL) through Internet and Wide Area Network, presenting it as ...
Virgilio Gilart-Iglesias, Francisco Maciá P...
ASPLOS
1989
ACM
13 years 11 months ago
Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
Robert Cohn, Thomas R. Gross, Monica S. Lam, P. S....
LCTRTS
2010
Springer
13 years 5 months ago
Translating concurrent action oriented specifications to synchronous guarded actions
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Jens Brandt, Klaus Schneider, Sandeep K. Shukla
DEBU
2010
152views more  DEBU 2010»
13 years 4 months ago
Implementing an Append-Only Interface for Semiconductor Storage
Solid-state disks are currently based on NAND flash and expose a standard disk interface. To accommodate limitations of the medium, solid-state disk implementations avoid rewritin...
Colin W. Reid, Philip A. Bernstein