Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
Wireless mesh networks promise to deliver resilient connectivity among network nodes, allowing data to be relayed seamlessly between mobile clients and infrastructure. Routing is ...
Peizhao Hu, Marius Portmann, Ricky Robinson, Jadwi...
As we enter the era of petascale computing, system architects must plan for machines composed of tens or even hundreds of thousands of processors. Although fully connected network...
Shoaib Kamil, Ali Pinar, Daniel Gunter, Michael Li...
In this work the Low Level Vision Unit (LLVU) of the Heterogeneous and Reconfigurable Machine for Image Analysis (HERMIA) is described. The LLVU consists of the innovative integra...