183 search results - page 11 / 37 » History-based memory mode prediction for improving memory pe... |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
EUROPAR
2003
Springer
14 years 19 days ago
2003
Springer
1 One common assumption of the existing models of load balancing is that the weights of resources and I/O buffer size are statically configured. Though the static configuration ...
PODS
2002
ACM
14 years 7 months ago
2002
ACM
We consider the fundamental operation of applying a conjunction of selection conditions to a set of records. With large main memories available cheaply, systems may choose to keep...
EUROPAR
2006
Springer
13 years 11 months ago
2006
Springer
Multi-resolution validation of hierarchical performance models of scientific applications is critical primarily for two reasons. First, the step-by-step validation determines the c...
ISVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...