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ICS
2009
Tsinghua U.
14 years 4 months ago
High-performance CUDA kernel execution on FPGAs
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
Alexandros Papakonstantinou, Karthik Gururaj, John...
ICS
2010
Tsinghua U.
14 years 2 months ago
Streamlining GPU applications on the fly: thread divergence elimination through runtime thread-data remapping
Because of their tremendous computing power and remarkable cost efficiency, GPUs (graphic processing unit) have quickly emerged as an influential computing platform for a broad ...
Eddy Z. Zhang, Yunlian Jiang, Ziyu Guo, Xipeng She...
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
13 years 8 months ago
Evolution of thread-level parallelism in desktop applications
As the effective limits of frequency and instruction level parallelism have been reached, the strategy of microprocessor vendors has changed to increase the number of processing ...
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mu...
COMPGEOM
2009
ACM
13 years 7 months ago
Geometric tomography: a limited-view approach for computed tomography
Computed tomography(CT), especially since the introduction of helical CT, provides excellent visualization of the internal organs of the body. As a result, CT is used routinely in...
Peter B. Noël, Jinhui Xu, Kenneth R. Hoffmann...
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
13 years 1 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...