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HPCA
1997
IEEE
15 years 8 months ago
Design Issues and Tradeoffs for Write Buffers
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...
Kevin Skadron, Douglas W. Clark
HPDC
1997
IEEE
15 years 8 months ago
Optimizing Layered Communication Protocols
Layering of protocols o ers several well-known advantages, but typically leads to performance ine ciencies. We present a model for layering, and point out where the performance pr...
Mark Hayden, Robbert van Renesse
163
Voted
LCTRTS
1998
Springer
15 years 8 months ago
Using UML for Modeling Complex Real-Time Systems
The embedded real-time software systems encountered in applications such as telecommunications, aerospace, and defense typically tend to be large and extremely complex. It is cruc...
Bran Selic
154
Voted
ICDCS
1997
IEEE
15 years 8 months ago
Secure Reliable Multicast Protocols in a WAN
A secure reliable multicast protocol enables a process to send a message to a group of recipients such that all correct destinations receive the same message, despite the maliciou...
Dahlia Malkhi, Michael Merritt, Ohad Rodeh
VISUALIZATION
1997
IEEE
15 years 8 months ago
A topology modifying progressive decimation algorithm
Triangle decimation techniques reduce the number of triangles in a mesh, typically to improve interactive rendering performance or reduce data storage and transmission requirement...
William J. Schroeder