148 search results - page 10 / 30 » How Well Can Simple Metrics Represent the Performance of HPC... |
TC
1998
13 years 7 months ago
1998
—High instruction cache hit rates are key to high performance. One known technique to improve the hit rate of caches is to minimize cache interference by improving the layout of ...
OSDI
2000
ACM
13 years 8 months ago
2000
ACM
Out-of-core applications consume physical resources at a rapid rate, causing interactive applications sharing the same machine to exhibit poor response times. This behavior is the...
TIT
2010
13 years 2 months ago
2010
Floating codes are codes designed to store multiple values in a Write Asymmetric Memory, with applications to flash memory. In this model, a memory consists of a block of n cells, ...
SIGCOMM
2006
ACM
14 years 1 months ago
2006
ACM
A pervasive requirement of distributed systems is to deal with churn — change in the set of participating nodes due to joins, graceful leaves, and failures. A high churn rate ca...
ISPASS
2005
IEEE
14 years 28 days ago
2005
IEEE
Performance evaluation using only a subset of programs from a benchmark suite is commonplace in computer architecture research. This is especially true during early design space e...