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CODES
2011
IEEE
12 years 8 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
EUROSSC
2009
Springer
14 years 1 months ago
Wireless Sensor Networks to Enable the Passive House - Deployment Experiences
Finding solutions for the current period of climate change or “global warming” is possibly the most serious and pressing challenge faced by scientists and the wider community t...
Tessa Daniel, Elena I. Gaura, James Brusey
PDP
2010
IEEE
14 years 23 days ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
IPSN
2004
Springer
14 years 1 months ago
Flexible power scheduling for sensor networks
We propose a distributed on-demand power-management protocol for collecting data in sensor networks. The protocol aims to reduce power consumption while supporting fluctuating dem...
Barbara Hohlt, Lance Doherty, Eric A. Brewer
IJSNET
2006
92views more  IJSNET 2006»
13 years 8 months ago
TTS: a two-tiered scheduling mechanism for energy conservation in wireless sensor networks
: In this paper, we present a two-tiered scheduling approach for effective energy conservation in wireless sensor networks. The effectiveness of this mechanism relies on dynamicall...
Nurcan Tezcan, Wenye Wang