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ICDE
2010
IEEE
248views Database» more  ICDE 2010»
14 years 7 months ago
FPGA Acceleration for the Frequent Item Problem
Abstract-- Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show...
Gustavo Alonso, Jens Teubner, René Mül...
MICRO
2010
IEEE
270views Hardware» more  MICRO 2010»
13 years 5 months ago
Many-Thread Aware Prefetching Mechanisms for GPGPU Applications
Abstract-- We consider the problem of how to improve memory latency tolerance in massively multithreaded GPGPUs when the thread-level parallelism of an application is not sufficien...
Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim...
FCCM
2002
IEEE
146views VLSI» more  FCCM 2002»
14 years 15 days ago
Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems
Several projects have developed compiler tools that translate high-level languages down to hardware description languages for mapping onto FPGAbased reconfigurable computers. Thes...
Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker...
COLING
1996
13 years 9 months ago
Reversible delayed lexical choice in a bidirectional framework
We describe a bidirectional framework for natural language parsing and generation, using a typedfeatureformalismand an HPSG-based grammar with a parser and generator derived from ...
Graham Wilcock, Yuji Matsumoto
FGCS
2007
89views more  FGCS 2007»
13 years 7 months ago
Federated grid clusters using service address routed optical networks
Clusters of computers have emerged as cost-effective parallel and/or distributed computing systems for computationally intensive tasks. Normally, clusters are composed of high per...
Isaac D. Scherson, Daniel S. Valencia, Enrique Cau...