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ISCA
2008
IEEE
113views Hardware» more  ISCA 2008»
14 years 3 months ago
A Two-Level Load/Store Queue Based on Execution Locality
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
Miquel Pericàs, Adrián Cristal, Fran...
ICS
2009
Tsinghua U.
14 years 1 months ago
A translation system for enabling data mining applications on GPUs
Modern GPUs offer much computing power at a very modest cost. Even though CUDA and other related recent developments are accelerating the use of GPUs for general purpose applicati...
Wenjing Ma, Gagan Agrawal
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
13 years 16 days ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
EUROPAR
2009
Springer
14 years 3 months ago
Impact of Quad-Core Cray XT4 System and Software Stack on Scientific Computation
An upgrade from dual-core to quad-core AMD processor on the Cray XT system at the Oak Ridge National Laboratory (ORNL) Leadership Computing Facility (LCF) has resulted in significa...
Sadaf R. Alam, Richard F. Barrett, Heike Jagode, J...
PODC
1991
ACM
14 years 13 days ago
Randomized Wait-Free Concurrent Objects (Extended Abstract)
d abstract) Maurice Herlihy Digital Equipment Corporation Cambridge Research Laboratory One Kendall Square Cambridge MA, 02139 Digital Equipment Corporation Cambridge Research Lab ...
Maurice Herlihy