33 search results - page 5 / 7 » Hybrid CMOS nanoelectronic digital circuits: devices, archit... |
ECCTD
2011
12 years 6 months ago
2011
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
ISPD
2005
ACM
14 years 20 days ago
2005
ACM
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. With thes...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
In this work, we report on an unprecedented design where digital, analog, and MEMS technologies are combined to realize a generalpurpose single-chip CMOS microsystem. The converge...
ASYNC
2006
IEEE
14 years 1 months ago
2006
IEEE
Distributed sensor networks, human body implants, and hand-held electronics have tight energy budgets that necessitate low power circuits. Most of these devices include an analog-...
GLVLSI
2008
IEEE
14 years 1 months ago
2008
IEEE
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...