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DAC
2005
ACM
16 years 7 months ago
Robust gate sizing by geometric programming
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...
Jaskirat Singh, Vidyasagar Nookala, Zhi-Quan Luo, ...
DAC
2004
ACM
16 years 7 months ago
Worst-case circuit delay taking into account power supply variations
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
Dionysios Kouroussis, Rubil Ahmadi, Farid N. Najm
ICNP
2006
IEEE
16 years 2 days ago
Rigorous Protocol Design in Practice: An Optical Packet-Switch MAC in HOL
— This paper reports on an experiment in network protocol design: we use novel rigorous techniques in the design process of a new protocol, in a close collaboration between syste...
Adam Biltcliffe, Michael Dales, Sam Jansen, Tom Ri...
CCGRID
2007
IEEE
15 years 10 months ago
STORM: An Approach to Database Storage Management in Clustered Storage Environments
Database storage management in clustered storage environments is a manual, time-consuming, and error-prone task. Such management involves regular movement of database objects acro...
Kaushik Dutta, Raju Rangaswami
CP
2006
Springer
15 years 9 months ago
Boosting Open CSPs
In previous work, a new approach called Open CSP (OCSP) was defined as a way of integrate information gathering and problem solving. Instead of collecting all variable values befor...
Santiago Macho González, Carlos Ansó...