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PC
2007
161views Management» more  PC 2007»
13 years 7 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
WWW
2008
ACM
14 years 8 months ago
Restful web services vs. "big"' web services: making the right architectural decision
Recent technology trends in the Web Services (WS) domain indicate that a solution eliminating the presumed complexity of the WS-* standards may be in sight: advocates of REpresent...
Cesare Pautasso, Olaf Zimmermann, Frank Leymann
ISORC
2009
IEEE
14 years 2 months ago
Marte CCSL to Execute East-ADL Timing Requirements
In the automotive domain, several loosely-coupled Architecture Description Languages (ADLs) compete to proet of abstract modeling and analysis services on top of the implementatio...
Frédéric Mallet, Marie-Agnès ...
CCGRID
2006
IEEE
14 years 1 months ago
Integrating the HLA RTI Services with Scilab
This paper describes the integration of the High Level Architecture (HLA), an IEEE standard for distributed interactive simulation, with a scientific software package (Scilab) and...
Thitima Theppaya, Pichaya Tandayya, Chatchai Janta...
VLSID
2002
IEEE
122views VLSI» more  VLSID 2002»
14 years 8 months ago
IEEE 1394a_2000 Physical Layer ASIC
CN4011A is IEEE 1394a_2000 standard Compliant Physical Layer ASIC. It is a 0.18um mixed-signal ASIC incorporating three analog ports, PLL, reference generator for analog along wit...
Ranjit Yashwante, Bhalchandra Jahagirdar