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» ISAC - Instance-Specific Algorithm Configuration
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ICIP
2007
IEEE
14 years 2 months ago
Buffer Constrained Proactive Dynamic Voltage Scaling for Video Decoding Systems
Significant power savings can be achieved on voltage/frequency configurable platforms by dynamically adapting the frequency and voltage according to the workload (complexity). Vid...
Emrah Akyol, Mihaela van der Schaar
DATE
2006
IEEE
195views Hardware» more  DATE 2006»
14 years 1 months ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
DFT
2006
IEEE
143views VLSI» more  DFT 2006»
14 years 1 months ago
Defect Tolerant and Energy Economized DSP Plane of a 3-D Heterogeneous SoC
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
Vijay K. Jain, Glenn H. Chapman
COLCOM
2005
IEEE
14 years 1 months ago
On-demand overlay networking of collaborative applications
We propose a new overlay network, called Generic Identifier Network (GIN), for collaborative nodes to share objects with transactions across affiliated organizations by merging th...
Cheng-Jia Lai, Richard R. Muntz
IPPS
2005
IEEE
14 years 1 months ago
Stream PRAM
Parallel random access memory, or PRAM, is a now venerable model of parallel computation that that still retains its usefulness for the design and analysis of parallel algorithms....
Darrell R. Ulm, Michael Scherger