Clock synchronization is critical for Wireless Sensor Networks (WSNs) due to the need of inter-node coordination and collaborative information processing. Although many message pa...
Event traces are helpful in understanding the performance behavior of message-passing applications since they allow in-depth analyses of communication and synchronization patterns...
Daniel Becker, John C. Linford, Rolf Rabenseifner,...
In this paper we generalize the Continuous Adversarial Queuing Theory (CAQT) model [5] by considering the possibility that the router clocks in the network are not synchronized. W...
Sequential elements, flip-flops, latches, and memory cells, are the most vulnerable components to soft errors. Since state-of-the-art designs contain millions of bistables, it i...
A gated current-controlled oscillator (GCCO) based topology is used to implement a low-power multi-channel clock and data recovery (CDR) system in a 0.18um digital CMOS technology...
Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi,...