759 search results - page 43 / 152 » Identifying Modeling Errors in Signatures by Model Checking |
DATE
2010
IEEE
14 years 2 months ago
2010
IEEE
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...
MOC
2002
13 years 8 months ago
2002
We study the convergence properties of the hp-version of the local discontinuous Galerkin finite element method for convection-diffusion problems; we consider a model problem in a ...
DSN
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper introduces SymPLFIED, a program-level framework which allows specification of arbitrary error detectors and the verification of their efficacy against hardware errors. ...
FMCAD
2007
Springer
14 years 3 months ago
2007
Springer
— Induction has been studied in model checking for proving the validity of safety properties, i.e., showing the absence of counterexamples. To our knowledge, induction has not be...
SMI
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a novel 3D shape descriptor "The Generalized Shape Distributions" for effective shape matching and analysis, by taking advantage of both local and gl...