Sciweavers

76 search results - page 5 / 16
» Impact of NBTI on FPGAs
Sort
View
HOST
2008
IEEE
14 years 2 months ago
Place-and-Route Impact on the Security of DPL Designs in FPGAs
—Straightforward implementations of cryptographic algorithms are known to be vulnerable to attacks aimed not at the mathematical structure of the cipher but rather at the weak po...
Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Dange...
FPL
2011
Springer
195views Hardware» more  FPL 2011»
12 years 7 months ago
The Impact of Aging on an FPGA-Based Physical Unclonable Function
—On-chip Physical Unclonable Functions (PUFs) are emerging as a powerful security primitive that can potentially solve several security problems. A PUF needs to be robust against...
Abhranil Maiti, Logan McDougall, Patrick Schaumont
FPL
2009
Springer
106views Hardware» more  FPL 2009»
13 years 10 months ago
An ASIC perspective on FPGA optimizations
In this paper we discuss how various design components perform in both FPGAs and standard cell based ASICs. We also investigate how various common FPGA optimizations will effect t...
Andreas Ehliar, Dake Liu
FPGA
2004
ACM
133views FPGA» more  FPGA 2004»
14 years 28 days ago
FPGAs vs. CPUs: trends in peak floating-point performance
Moore’s Law states that the number of transistors on a device doubles every two years; however, it is often (mis)quoted based on its impact on CPU performance. This important co...
Keith D. Underwood
ICCAD
2001
IEEE
103views Hardware» more  ICCAD 2001»
14 years 4 months ago
Interconnect Resource-Aware Placement for Hierarchical FPGAs
In this paper, we utilize Rent’s rule as an empirical measure for efficient clustering and placement of circuits on hierarchical FPGAs. We show that careful matching of design c...
Amit Singh, Ganapathy Parthasarathy, Malgorzata Ma...