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» Impact of Parallel Workloads on NoC Architecture Design
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ICPP
2009
IEEE
16 years 10 days ago
Bank-aware Dynamic Cache Partitioning for Multicore Architectures
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...
Dimitris Kaseridis, Jeffrey Stuecheli, Lizy K. Joh...
IPPS
2008
IEEE
16 years 3 days ago
Financial modeling on the cell broadband engine
High performance computing is critical for financial markets where analysts seek to accelerate complex optimizations such as pricing engines to maintain a competitive edge. In th...
Virat Agarwal, Lurng-Kuo Liu, David A. Bader
MTPP
2010
15 years 14 days ago
Parallelization of Motion JPEG Decoder on TILE64 Many-Core Platform
The ubiquity of many-core architectures poses challenges to software developers to make scalable software. To parallelize data-intensive applications on a many-core platform, one h...
Xuan-Yi Lin, Chung-Yu Huang, Pei-Man Yang, Tai-Wen...
PPOPP
2003
ACM
15 years 11 months ago
A component architecture for LAM/MPI
To better manage the ever increasing complexity of LAM/MPI, we have created a lightweight component architecture for it that is specifically designed for high-performance message p...
Jeffrey M. Squyres
IPPS
2006
IEEE
15 years 11 months ago
A framework to develop symbolic performance models of parallel applications
Performance and workload modeling has numerous uses at every stage of the high-end computing lifecycle: design, integration, procurement, installation and tuning. Despite the trem...
Sadaf R. Alam, Jeffrey S. Vetter