305 search results - page 30 / 61 » Impact of Parallel Workloads on NoC Architecture Design |
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
HIPC
2009
Springer
13 years 5 months ago
2009
Springer
In many-core architectures, memory blocks are commonly assigned to the banks of a NUCA cache by following a physical mapping. This mapping assigns blocks to cache banks in a round-...
HPDC
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper describes the design and implementation of SWORD, a scalable resource discovery service for widearea distributed systems. In contrast to previous systems, SWORD allows ...
HPCA
2005
IEEE
14 years 1 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
PDCAT
2004
Springer
14 years 29 days ago
2004
Springer
Abstract. This paper proposes a simplified simultaneous multithreading (SMT) architecture aiming at CPU cores of embedded SoCs for consumer applications. This architecture reduces...