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ICCD
2007
IEEE
322views Hardware» more  ICCD 2007»
14 years 5 months ago
Voltage drop reduction for on-chip power delivery considering leakage current variations
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
Jeffrey Fan, Ning Mi, Sheldon X.-D. Tan
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
14 years 3 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
ISCA
2002
IEEE
105views Hardware» more  ISCA 2002»
14 years 1 months ago
Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
Anoop Iyer, Diana Marculescu
VLSID
2008
IEEE
142views VLSI» more  VLSID 2008»
14 years 9 months ago
Temperature and Process Variations Aware Power Gating of Functional Units
Technology scaling has resulted in an exponential increase in the leakage power as well as the variations in leakage power of fabricated chips. Functional units (FUs), like Intege...
Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sar...
RTS
2011
131views more  RTS 2011»
13 years 3 months ago
Global scheduling based reliability-aware power management for multiprocessor real-time systems
Reliability-aware power management (RAPM) has been a recent research focus due the negative effects of the popular power management technique dynamic voltage and frequency scaling ...
Xuan Qi, Dakai Zhu, Hakan Aydin