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IEEEPACT
2005
IEEE
14 years 2 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...
ICPP
1993
IEEE
14 years 25 days ago
Scalability Study of the KSR-1
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...
ISHPC
1999
Springer
14 years 29 days ago
Utilization of Cache Area in On-Chip Multiprocessor
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
Hitoshi Oi, N. Ranganathan
HPCA
2009
IEEE
14 years 9 months ago
Fast complete memory consistency verification
The verification of an execution against memory consistency is known to be NP-hard. This paper proposes a novel fast memory consistency verification method by identifying a new na...
Yunji Chen, Yi Lv, Weiwu Hu, Tianshi Chen, Haihua ...
PVM
2010
Springer
13 years 7 months ago
Enabling Concurrent Multithreaded MPI Communication on Multicore Petascale Systems
With the ever-increasing numbers of cores per node on HPC systems, applications are increasingly using threads to exploit the shared memory within a node, combined with MPI across ...
Gábor Dózsa, Sameer Kumar, Pavan Bal...