Sciweavers

1272 search results - page 70 / 255
» Implementation of Bitmap Based Incognito and Performance Eva...
Sort
View
TVLSI
2008
164views more  TVLSI 2008»
13 years 9 months ago
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
RECONFIG
2008
IEEE
122views VLSI» more  RECONFIG 2008»
14 years 3 months ago
Using a CSP Based Programming Model for Reconfigurable Processor Arrays
The growing trend towards adoption of flexible and heterogeneous, parallel computing architectures has increased the challenges faced by the programming community. We propose a me...
Zain-ul-Abdin, Bertil Svensson
PERCOM
2010
ACM
14 years 1 months ago
Negotiate power and performance in the reality of RFID systems
—Recent years have witnessed the wide adoption of the RFID technology in many important application domains including logistics, inventory, retailing, public transportation, and ...
Xunteng Xu, Lin Gu, Jianping Wang, Guoliang Xing
RAS
2002
131views more  RAS 2002»
13 years 8 months ago
Behavior generation for a mobile robot based on the adaptive fitness function
We have to prepare the evaluation (fitness) function to evaluate the performance of the robot when we apply the machine learning techniques to the robot application. In many cases,...
Eiji Uchibe, Masakazu Yanase, Minoru Asada
ICLP
2007
Springer
14 years 3 months ago
Logic Programming Approach to Automata-Based Decision Procedures
We propose a novel technique that maps decision problems in WS1S (weak monadic second-order logic with n successors) to the problem of query evaluation of Complex-value Datalog que...
Gulay Ünel, David Toman