Sciweavers

185 search results - page 8 / 37
» Implementation of Gabor-Type Filters on Field Programmable G...
Sort
View
ITCC
2005
IEEE
14 years 1 months ago
FPGA Implementations of the ICEBERG Block Cipher
— This paper presents FPGA (Field Programmable Gate Array) implementations of ICEBERG, a block cipher designed for reconfigurable hardware implementations and presented at FSE 2...
François-Xavier Standaert, Gilles Piret, Ga...
DSD
2005
IEEE
123views Hardware» more  DSD 2005»
14 years 1 months ago
Hardware-Based Implementation of the Common Approximate Substring Algorithm
An implementation of an algorithm for string matching, commonly used in DNA string analysis, using configurable technology is proposed. The design of the circuit allows for pipeli...
Kenneth B. Kent, Sharon Van Schaick, Jacqueline E....
FCCM
2003
IEEE
185views VLSI» more  FCCM 2003»
14 years 1 months ago
Implementation of a Content-Scanning Module for an Internet Firewall
A module has been implemented in Field Programmable Gate Array (FPGA) hardware that scans the content of Internet packets at Gigabit/second rates. All of the packet processing ope...
James Moscola, John W. Lockwood, Ronald Prescott L...
IJCNN
2000
IEEE
14 years 2 days ago
Hardware Implementation of a PCA Learning Network by an Asynchronous PDM Digital Circuit
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
Yuzo Hirai, Kuninori Nishizawa
IJCNN
2006
IEEE
14 years 1 months ago
A Scalable FPGA Implementation of Cellular Neural Networks for Gabor-type Filtering
— We describe an implementation of Gabor-type filters on field programmable gate arrays using the cellular neural network (CNN) architecture. The CNN template depends upon the ...
Ocean Y. H. Cheung, Philip Heng Wai Leong, Eric K....