164 search results - page 6 / 33 » Implementation of a SliM Array Processor |
ICPP
1991
IEEE
13 years 11 months ago
1991
IEEE
This paper presents an architecture for programmable systolic arrays that provides simple and e cient systolic communication. The Brown Systolic Array is a linear implementation o...
IPPS
2002
IEEE
14 years 8 days ago
2002
IEEE
SAC is a purely functional array processing language designed with numerical applications in mind. It supports generic, high-level program specifications in the style of APL. How...
ERSA
2009
13 years 5 months ago
2009
An effective way to implement image processing applications is to use embedded processors with dynamically reconfigurable accelerator cores. The processing speed of these processor...
DFT
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
ISCAS
2003
IEEE
14 years 19 days ago
2003
IEEE
Motion estimation is a complex computation found in video compression algorithms, such as standards like MPEG-4 and H.263. This paper proposes an embedded reconfigurable array for...