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» Implementation of a Streaming Execution Unit
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IPPS
2008
IEEE
14 years 4 months ago
High performance MPEG-2 software decoder on the cell broadband engine
The Sony-Toshiba-IBM Cell Broadband Engine is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD coprocessing units (SPEs) ...
David A. Bader, Sulabh Patel
DSD
2011
IEEE
200views Hardware» more  DSD 2011»
12 years 9 months ago
Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors
Abstract—We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accele...
Jaroslav Sykora, Leos Kafka, Martin Danek, Lukas K...
NSDI
2004
13 years 11 months ago
MACEDON: Methodology for Automatically Creating, Evaluating, and Designing Overlay Networks
Currently, researchers designing and implementing largescale overlay services employ disparate techniques at each stage in the production cycle: design, implementation, experiment...
Adolfo Rodriguez, Charles Edwin Killian, Sooraj Bh...
IPPS
2006
IEEE
14 years 3 months ago
A code motion technique for accelerating general-purpose computation on the GPU
Recently, graphics processing units (GPUs) are providing increasingly higher performance with programmable internal processors, namely vertex processors (VPs) and fragment process...
T. Ikeda, Fumihiko Ino, Kenichi Hagihara
IPPS
2002
IEEE
14 years 2 months ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...