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INTEGRATION
2008
127views more  INTEGRATION 2008»
13 years 6 months ago
A Viterbi decoder architecture for a standard-agile and reprogrammable transceiver
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...
Lucia Bissi, Pisana Placidi, Giuseppe Baruffa, And...
WACC
1999
ACM
14 years 1 days ago
Building a federation of process support systems
The effort in software process support has focused so far on modeling and enacting processes. A certain amount of work has been done, but little has reached a satisfactory level o...
Jacky Estublier, Mahfoud Amiour, Samir Dami
SECON
2010
IEEE
13 years 5 months ago
Coexistence-Aware Scheduling for Wireless System-on-a-Chip Devices
Abstract--Today's mobile devices support many wireless technologies to achieve ubiquitous connectivity. Economic and energy constraints, however, drive the industry to impleme...
Lei Yang, Vinod Kone, Xue Yang, York Liu, Ben Y. Z...
MOBICOM
1996
ACM
13 years 12 months ago
Security on the Move: Indirect Authentication using Kerberos
Even as mobile computing and network computing are gaining momentum, Internet security is sharing the spotlight. Security and authentication on open networks is already a difficul...
Armando Fox, Steven D. Gribble
ETS
2010
IEEE
130views Hardware» more  ETS 2010»
13 years 8 months ago
A distributed architecture to check global properties for post-silicon debug
Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking g...
Erik Larsson, Bart Vermeulen, Kees Goossens